1. Field of the Invention
The present invention relates to a micro-power source module, which is part of a micro-power source device used in portable devices, personal computers, etc.
2. Description of the Related Art
Multiple low-voltage supply power sources specific to an LSI (large scale integrated circuit) are mounted on a printed circuit board called a high-speed board in current electronic apparatus. It is desired that the space (area and height) occupied by the low-voltage supply power sources mounted on such a printed circuit board be made as small as possible. The low-voltage supply power sources (power source devices) specific to an LSI are called POL (point of load) power sources. Each of them is composed of discrete components such as a power source IC, an inductor, and capacitors and supplies power to the LSI as a load. The POL power sources are disposed close to the LSI and mounted on the same printed circuit board, as is the LSI. In many cases, one LSI mounted on a current printed circuit board requires two power sources (two voltage levels) or three power sources (three voltage levels), that is, two or three POL power sources. However, there are strict restrictions on space on printed circuit boards and it is difficult to dispose all of plural POL power sources close to an LSI. In particular, very strict restrictions are imposed on spaces for printed circuit boards of cell phones. Therefore, POL power sources to be mounted on a printed circuit board are required to occupy spaces that are as small as possible. In the case of cell phones, cell phone manufacturers not only require that the areas occupied by POL power sources be reduced, but also make a severe requirement that the height be less than 1 mm.
To meet such requirements, a micro-power source module has been developed in which a power IC and an inductor are integrated together. At present, the occupied area of a printed circuit board is reduced by mounting such a micro-power source module and input and output capacitors on the printed circuit board. FIGS. 14-16 show the configuration of a conventional POL power source. More specifically, FIGS. 14-16 are a circuit diagram, a layout diagram showing a layout on a printed circuit board, and a plan view of important parts of an inductor, respectively. A POL power source 203 (power source device) is composed of an input capacitor 1, an inductor 35, a power source IC 101, and an output capacitor 3. The power source IC 101 is mounted on the inductor 35. As shown in FIGS. 14 and 15, a high-potential-side interconnection of a power source 12 is connected to a high-potential-side input terminal 15. The input terminal 15 is connected to one terminal j of the input capacitor 1, which is connected to a high-potential-side input terminal d of the power source IC 101 via an external terminal a, which is formed in the inductor 35. A high-potential-side output terminal e of the power source IC 101 is connected to one terminal m of the inductor 35. The other terminal b of the inductor 35 is connected to one terminal k of the output capacitor 3, which is connected to a high-potential-side output terminal 17 of the POL power source 203. The output terminal 17 is connected to the high-potential side of a load 13.
The other terminal g of the input capacitor 1 is connected to a ground-side input terminal 16 of the POL power source 203. A ground terminal f of the power source IC 101 is connected to a connecting point h via a terminal c in the inductor 35. The other terminal i of the output capacitor 3 is connected, at a ground-side output terminal 18 of the POL power source 203, to a ground line 21 which is connected to a ground 14 of the power source 12. The portion of the ground line 21 between the input terminal 16 and the connecting point h is a first ground line 19, and the portion of the ground line 21 between the connecting point h and output terminal 18 is a second ground line 20. The input terminals 15 and 16, the output terminal 17 and 18, and the connecting point h are located on a printed circuit board 60. The inductances of the first ground line 19 and the second ground line 20 are a first GND inductance Lgnd1 and a second GND inductance Lgnd2, respectively. Symbols Lgnd1 and Lgnd2 are generically referred to as Lgnd. The power source IC 101 is composed of an on-MOSFET 6, an off-MOSFET 7, and a control circuit 8 for controlling them. The source of the on-MOSFET 6 is connected to the high-potential-side input terminal d of the power source IC 101. The drain of the on-MOSFET 6 and the drain of the off-MOSFET 7 are connected to the high-potential-side output terminal e of the power source IC 101. The source of the off-MOSFET 7 is connected to the ground terminal f of the power source IC 101.
The on-MOSFET 6 is a p-channel MOSFET and the off-MOSFET 7 is an n-channel MOSFET. The off-MOSFET 7 serves as a free wheel diode for returning a current flowing through the inductor 35. The POL power source 203 is a power source for the load 13 (e.g., an LSI) and is a low-voltage power source which outputs one voltage level. As shown in FIG. 16, in the inductor 35, a solenoid coil is formed in such a manner that a top coil pattern 24a and a bottom coil pattern 24b are formed on both sides of a ferrite substrate 24 and are connected to each other by connection conductors 24c through through-holes that are formed through the ferrite substrate 24. Terminals 30 are arranged along the periphery of the ferrite substrate 24; each terminal 30 is formed in such a manner that a front-side portion and a back-side portion are connected to each other on a side surface of the ferrite substrate 24. The two terminals m and b of the plural terminals 30 are connected to the two respective ends of the solenoid coil, and the terminals a and c are relay terminals for connecting the terminals d and f of the power source IC 101 to wiring patterns on the printed circuit board 60. JP-A-2004-72815 discloses a micro-power source module in which to reduce the occupied area of a POL power source a power source IC, an inductor, and capacitors are formed in three lamination layers. POL power sources are required not only to be small in occupied space as described above but also to exhibit low-noise performance. POL power sources output a low voltage, which directly affects whether an S/N ratio that is required by an LSI as a load (low voltage/high frequency) is satisfied. Therefore, POL power sources are strongly required to exhibit low-noise performance.
JP-A-62-124723 relates to a T-type filter that is known to be generally able to attain larger attenuation than a combination of an independent inductor and capacitor. Inductance elements are connected to both ends of a lead wire and a capacitor is connected to the lead wire. This publication states that because of this structure two adjoining inductors can be formed collectively and a T-type LC lowpass filter can easily be constructed by connecting a capacitor to one location. JP-A-6-251996 discloses an LC filter array which is constructed by sandwiching a lead frame between top and bottom ferrite blocks, inserting a chip capacitor into a through-hole that is formed through the bottom ferrite block so as to reach the lead frame, connecting one terminal electrode of the chip capacitor to the lead frame, and connecting the other terminal electrode to a common ground terminal provided on the bottom surface of the bottom ferrite block. This LC filter array is simple in structure, can be assembled easily, and has high productivity (i.e., suitable for mass production).
However, in the micro-power source module of JP-A-2004-72815 in which a power source IC, an inductor, and capacitors are formed in three lamination layers, the height is greater than 1 mm though the occupied area is small. Therefore, it is difficult to apply this module to uses such as cell phones in which the occupied height requirement is severe. In the conventional POL power source in which the input and output capacitors are provided on the printed circuit board, it is difficult to realize low-noise performance because of the GND inductance Lgnd which is formed by lines on the printed circuit board. Furthermore, it is difficult to employ the filters of JP-A-62-124723 and JP-A-6-251996 because they are too large in height and area for filters to be used in a micro-power source module. FIGS. 17 and 18 are graphs showing simulation results indicating that a difference in the GND inductance Lgnd on a printed circuit board results in different attenuation characteristics (differences in noise performance). FIG. 17 shows a simulation result of a case where Lgnd1=Lgnd2=1 nH, and FIG. 18 shows a simulation result of a case where Lgnd1=Lgnd2=3 nH. FIGS. 19A and 19B are equivalent circuit diagrams that were used for simulating the attenuation characteristics of FIGS. 17 and 18, and correspond to an on state and an off state, respectively.
The on state means a state in which power is supplied to the load 13 with the on-MOSFET 6 on and the off-MOSFET 7 off. The off state means a state in which power is supplied to the load 13 with the on-MOSFET 6 off and the off-MOSFET 7 on. High-frequency noise is generated when the MOSFETs 6 and 7 are switched on or off, and is propagated to the load 13 as conduction noise. The conduction noise is classified into on-time noise that is generated when power is supplied to the load 13 with the on-MOSFET 6 on and the off-MOSFET 7 off and off-time noise that is generated when power is supplied to the load 13 with the on-MOSFET 6 off and the off-MOSFET 7 on. FIG. 19A shows an equivalent circuit for an on-time simulation of the circuit of FIG. 14, that is, a circuit through which a current flows when the on-MOSFET 6 is on and the off-MOSFET 7 is off (the power source 12 is removed). More specifically, a noise generator 50 is inserted in place of the on-MOSFET 6 and the off-MOSFET 7 is removed, resulting in a circuit consisting of the inductor 35, the output capacitor 3, the second ground line 20, the first ground line 19, and the input capacitor 1. The noise generator 50 produces a noise-simulated high-frequency voltage and a voltage across the output capacitor 3 is simulated as an output voltage.
FIG. 19B shows an equivalent circuit for an off-time simulation of the circuit of FIG. 14, that is, a circuit through which a current flows when the on-MOSFET 6 is off and the off-MOSFET 7 is on. More specifically, a noise generator 50 is inserted in place of the off-MOSFET 7 and the on-MOSFET 6 is removed, resulting in a circuit consisting of the inductor 35, the output capacitor 3, and the second ground line 20. A voltage across the output capacitor 3 of the equivalent circuit is simulated. The noise generator 50 produces a high-frequency voltage in a frequency range of 1 to 1,000 MHz and a resulting high-frequency output voltage is simulated. The degree of reduction of a peak value of an output waveform with respect to a peak value of an input waveform, that is, (peak value of output waveform)/(peak value of input waveform) in dB, is employed as an attenuation amount. And frequency dependence of the attenuation amount is an attenuation characteristic. As the attenuation amount increases, it becomes harder for the conduction noise to be transmitted the load 13, which means better low-noise performance (reduction in output noise). The vertical axes of FIGS. 17 and 18 represent the off-time attenuation amount. As seen from FIGS. 17 and 18, the attenuation characteristic depends on the inductance (GND inductance) of the ground line 21. That is, as the GND inductance increases, the attenuation amount decreases and hence more conduction noise is transmitted from the output terminal 17 to the load 13 (LSI).
In common POL power sources, a set maker purchases plural discrete components such as a power source IC, an inductor, and input and output capacitors and arranges these discrete components on a wiring-patterned printed circuit board (layout/artwork wiring). Therefore, the GDN inductance, which is the inductance of the ground line 21, strongly depends on the wiring pattern of the printed circuit board used by the set maker. Even if power source circuits are identical on a circuit diagram, they may have very different attenuation characteristics if their wiring patterns for arrangement of the discrete components are different from each other. From the viewpoint of set makers, this is not convenient because the noise performance depends on the wiring pattern in the case where a power source IC, an inductor, and input and output capacitors are attached individually to a printed circuit board. Difficulty of use of discrete components is an obstruction to development of apparatus by set makers. Therefore, device makers are required to develop and supply devices (micro-power source modules) that are easy to use. From this viewpoint, the micro-power source module 202 of FIG. 15 in which the power source IC 101 and the inductor 35 are integrated together is easy to use for set makers in a sense that the number of components is small. However, in terms of noise performance, the micro-power source module 202 is not easy to use because the micro-power source module 202 and the input and output capacitors 1 and 3 are to be wired separately on the printed circuit board 60 and hence the GND inductance of the ground line 21 depends on the wiring pattern of the printed circuit board 60.
Therefore, the device maker that supplies the micro-power source module 202 is strongly required to reduce conduction noise that depends on the ground line 21 (i.e., to improve noise performance) while avoiding increase of the occupied space of the POL power source 203 and minimizing the cost increase. JP-A-2004-72815 discloses a micro-power source module in which ceramic capacitors, an inductor, and an IC chip are formed in lamination layers. This configuration is effective in attaining low-noise performance in that the GND inductance is less prone to be influenced by the wiring pattern of a printed circuit board and a shortest route of a high-frequency current in the module can be realized. However, this micro-power source module having the three-layer lamination structure is large in occupied height (more than 1 mm) and cannot satisfy the requirement of cell phone manufacturers. Furthermore, it is necessary to dispose the two ceramic capacitors (input and output capacitors) under the inductor and to arrange, along the entire peripheries of the capacitors, many external terminals for outputting signals to be transmitted to the printed circuit board. Therefore, this module is more difficult to manufacture than a module in which external terminals are formed in an inductor. On the other hand, although the T-type filter itself is a promising means for noise reduction, using, as a discrete component, the T-type filter as disclosed in JP-A-62-124723 or JP-A-6-251996 cannot solve the problems relating to the cost, the size, and the ground inductance Lgnd.